Powerful tool to automate creating VHDL testbenches. Supports complex patterns and repeats to describe tests. Test can be split in modules. Flexible - any variable can be include not just signals to allow user enhancements. Plot preview. Simulator displays descriptions as tests run. Worked example and 30 day license available at www.fullcircuit.com
- License: Commercial
- Language: English
- Release: 2000-12-18
- Size: 216 Kb
- Cost: 120.00 $
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